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Virtuoso Multi-Mode Simulation (MMSIM)相关

已有 9128 次阅读| 2011-12-1 04:15 |个人分类:Cadence

直接拷贝过来的，尚需整理
Virtuoso Multi-Mode Simulation - MMSIM72

Example script. with environment variables to MMSIM72

setenv CDS_LIC_FILE setenv CDS_LIC_FILE ' ); document.write( addy19413 ); document.write( '<\/a>' ); //--> 30000@machine1.universite.fr ' ); //--> Cette adresse email est protégée contre les robots des spammeurs, vous devez activer Javascript. pour la voir. This email address is protected against spam bots, you need JavaScript. enabled to view it. ' ); //-->

unsetenv locale unsetenv local

#MMSIM72 spectre # MMSIM72 spectrum
setenv PATH /cnfm/Cadence/MMSIM72/tools/bin:$PATH setenv PATH / cnfm/Cadence/MMSIM72/tools/bin: $ PATH
setenv PATH /cnfm/Cadence/MMSIM72/tools/dfII/bin:$PATH setenv PATH / cnfm/Cadence/MMSIM72/tools/dfII/bin: $ PATH
setenv PATH /cnfm/Cadence/MMSIM72/tools/spectre/bin:$PATH setenv PATH / cnfm/Cadence/MMSIM72/tools/spectre/bin: $ PATH
setenv LD_LIBRARY_PATH /cnfm/Cadence/MMSIM72/tools/lib setenv LD_LIBRARY_PATH / cnfm/Cadence/MMSIM72/tools/lib

Tutoriels Virtuoso UltraSim simulator Virtuoso tutorials ULTRASIM simulator

Vous trouverez dans la documentation Cadence des informations concernant les tutoriels pour Virtuoso Multi-mode Simulation: You will find in the documentation of information about Cadence tutorials Virtuoso Multi-mode Simulation:

/cnfm/Cadence/MMSIM72/doc/UltraSim_User/UltraSim_User.pdf / Cnfm/Cadence/MMSIM72/doc/UltraSim_User/UltraSim_User.pdf

UltraSim_user.pdf, Introduction to Virtuoso UltraSim Simulator, Creating Tutorial Directories (page 46): UltraSim_user.pdf, Introduction to Virtuoso ULTRASIM Simulator Tutorial Creating Directories (page 46):

The Virtuoso UltraSim simulator tutorials provide examples to help you get started using the simulator. The Virtuoso ULTRASIM simulator tutorials Provide examples to help you get started using the simulator. Running the tutorials is recommended to obtain hands-on experience using the Virtuoso UltraSim simulator features and options. Running the tutorials IS recommended to Obtain hands-on experience using the Virtuoso ULTRASIM simulator features and options. There are four categories of tutorials in the examples directory of the Virtuoso UltraSim simulator installation: There are categories of oven tutorials in the examples directory of the simulator ULTRASIM Virtuoso installation:

■ UltraSim_Workshop – Virtuoso UltraSim simulator standalone and Virtuoso UltraSim simulator in the Cadence analog design environment (ADE). ■ UltraSim_Workshop - Virtuoso and Virtuoso ULTRASIM standalone simulator in the Cadence simulator ULTRASIM analog design environment (ADE).

■ usim_ade – Virtuoso UltraSim simulator in ADE. ■ usim_ade - Virtuoso ULTRASIM simulator in ADE.

■ Usim_Verilog – Virtuoso UltraSim simulator and Verilog-XL co-simulation. ■ Usim_Verilog - Virtuoso ULTRASIM Verilog-XL simulator and co-simulation.
Note: All of the Virtuoso UltraSim simulator ADE and Verilog-XL examples can be run in the IC 5.0.33 USR3 and 5.0.41 or later releases (fast envelope analysis in ADE requires 5.0.33 USR4 or 5.1.41 USR1). Note: All of the Virtuoso ULTRASIM simulator Verilog-XL and ADE Can Be examples run in the IC 5.0.33 and 5.0.41 or later USR3 releases (fast envelope analysis in ADE Requires 5.0.33 or 5.1.41 USR4 USR1).

■ USIM_NetlistBased_EMIR_Flow – Virtuoso UltraSim simulator netlist-based electromigration (EM) and IR drop analysis flow. ■ USIM_NetlistBased_EMIR_Flow - Virtuoso netlist-based simulator ULTRASIM ELECTROMIGRATION (MS) and IR drop analysis flow.
Note: This flow is based on OpenAccess (OA), and IC 5.1.41 USR3 or IC 6.1 and higher is required. Note: This IS flow based on OpenAccess (OA), and IC or IC 5.1.41 USR3 6.1 and Higher IS required.

UltraSim_Workshop UltraSim_Workshop

The UltraSim_Workshop tutorial includes 16 examples, covering the most important features of the Virtuoso UltraSim simulator (that is, Virtuoso UltraSim standalone and Virtuoso UltraSim/ADE examples). The tutorial includes 16 examples UltraSim_Workshop, Covering The Most important features of the Virtuoso ULTRASIM simulator (That Is, Virtuoso and Virtuoso ULTRASIM ULTRASIM standalone / ADE examples).

To run UltraSim_Workshop: To run UltraSim_Workshop:

1. 1. Create a directory called ultrasim_workshop. Create a directory called Set ultrasim_workshop.

2. 2. Copy the pll.tar.gz, mult.tar.gz, and sp_mult_ade.tar.gz files to the ultrasim_workshop directory from ultrasim_install_dir/tools/ultrasim/examples/UltraSim_Workshop/ as shown below: Copy the pll.tar.gz, mult.tar.gz, and sp_mult_ade.tar.gz files to the directory from ultrasim_workshop ultrasim_install_dir / tools / ULTRASIM / examples / UltraSim_Workshop / as Shown below:

cd ultrasim_workshop cd ultrasim_workshop
cp -r /cnfm/Cadence/MMSIM72/tools/ultrasim/examples/UltraSim_Workshop/* . cp-r / cnfm/Cadence/MMSIM72/tools/ultrasim/examples/UltraSim_Workshop / *.

3. 3. Untar the pll.tar.gz and mult.tar.gz files. Untar the pll.tar.gz mult.tar.gz and files.

4. 4. Follow the instructions in the UltraSim_workshop.pdf document (located in the /cnfm/Cadence/MMSIM72/tools/ultrasim/examples/UltrSim_Workshop/doc/ directory). Follow the instructions in the document UltraSim_workshop.pdf (Located in the / cnfm/Cadence/MMSIM72/tools/ultrasim/examples/UltrSim_Workshop/doc / directory).

usim_ade usim_ade

The usim_ade tutorial contains a complete, step-by-step example which describes how to run key Virtuoso UltraSim simulator options in ADE. The tutorial contains a usim_ade complete, step-by-step example Which Describes how to run key in Virtuoso ADE ULTRASIM simulator options.

If you are using version: If you are using version:

■ IC5033USR2, IC5033USR3, or IC5141, copy the files from /cnfm/Cadence/MMSIM72/tools/ultrasim/examples/usim_ade/5033USR2_USR3_5141/*. ■ IC5033USR2, IC5033USR3, or IC5141, copy the files from / cnfm/Cadence/MMSIM72/tools/ultrasim/examples/usim_ade/5033USR2_USR3_5141 / *.
■ IC5033USR4 or IC5141USR1, copy the files from /cnfm/Cadence/MMSIM72/tools/ultrasim/examples/usim_ade/5033USR4_5141USR1/*. ■ IC5033USR4 gold IC5141USR1, copy the files from / cnfm/Cadence/MMSIM72/tools/ultrasim/examples/usim_ade/5033USR4_5141USR1 / *.

To run usim_ade To run usim_ade

1. 1. Create a directory called ultrasim_ade. Create a directory called Set ultrasim_ade.

2. 2. Copy the usimADE_tut.tar.gz file to the ultrasim_ade directory from /tools/ultrasim/examples/usim_ade/ as shown below: Copy the file to the usimADE_tut.tar.gz ultrasim_ade directory from / tools / ULTRASIM / examples / usim_ade / as Shown below:

cd ultrasim_ade cd ultrasim_ade
cp -r /cnfm/Cadence/MMSIM72/tools/ultrasim/examples/usim_ade/5033USR2_USR3_5141/* . cp-r / cnfm/Cadence/MMSIM72/tools/ultrasim/examples/usim_ade/5033USR2_USR3_5141 / *.

Note: The updated ADE tutorials are located in the 5141USR2 directory. Note: The tutorials are updated ADE Located in the 5141USR2 directory.

3. 3. Untar the usimADE_tut.tar.gz file. Untar the file usimADE_tut.tar.gz.

gzip -cd usimADE_tut.tar.gz | tar xvf - usimADE_tut.tar.gz gzip-cd | tar xvf -

4. 4. Follow the instructions in the UltraADE_tut.pdf document. Follow the instructions in the document UltraADE_tut.pdf.

Usim_Verilog Usim_Verilog

The Usim_Verilog tutorial contains a mixed signal example for Virtuoso UltraSim simulator and Verilog-XL co-simulation. The tutorial contains Usim_Verilog example for a mixed signal simulator Virtuoso ULTRASIM and Verilog-XL co-simulation.

If you are using version: If you are using version:

■ IC5033USR2, IC5033USR3, or IC5141, copy the files from /cnfm/Cadence/MMSIM72/tools/ultrasim/examples/Usim_Verilog/5033USR2_USR3_5141/*. ■ IC5033USR2, IC5033USR3, or IC5141, copy the files from / cnfm/Cadence/MMSIM72/tools/ultrasim/examples/Usim_Verilog/5033USR2_USR3_5141 / *.
■ IC5033USR4 or IC5141USR1, copy the files from /cnfm/Cadence/MMSIM72/tools/ultrasim/examples/Usim_Verilog/5033USR4_5141USR1/*. ■ IC5033USR4 gold IC5141USR1, copy the files from / cnfm/Cadence/MMSIM72/tools/ultrasim/examples/Usim_Verilog/5033USR4_5141USR1 / *.

To run Usim_Verilog To run Usim_Verilog

1. 1. Create a directory called verimix_usim. Create a directory called Set verimix_usim.

2. 2. Copy the UsimVerilog_tut.tar.gz file to the verimix_usim directory from /cnfm/Cadence/MMSIM72/tools/ultrasim/examples/Usim_Verilog/ as shown below: Copy the file to the UsimVerilog_tut.tar.gz verimix_usim directory from / cnfm/Cadence/MMSIM72/tools/ultrasim/examples/Usim_Verilog / as Shown below:

cd verimix_usim cd verimix_usim
cp -r /cnfm/Cadence/MMSIM72/tools/ultrasim/examples/Usim_Verilog/5033USR2_USR3_5141/* . cp-r / cnfm/Cadence/MMSIM72/tools/ultrasim/examples/Usim_Verilog/5033USR2_USR3_5141 / *.

Note: The updated UltraSimVerilog tutorials are located in the 5141USR2 directory. Note: The tutorials are updated UltraSimVerilog Located in the 5141USR2 directory.

3. 3. Untar the UsimVerilog_tut.tar.gz file. Untar the file UsimVerilog_tut.tar.gz.

gzip -cd UsimVerilog_tut.tar.gz | tar xvf - UsimVerilog_tut.tar.gz gzip-cd | tar xvf -

4. 4. Follow the instructions in the UsimVerilog_tut.pdf document. Follow the instructions in the document UsimVerilog_tut.pdf.

USIM_NetlistBased_EMIR_Flow USIM_NetlistBased_EMIR_Flow

The USIM_NetlistBased_EMIR_Flow tutorial contains a netlist-based EM/IR flow example for the Virtuoso UltraSim simulator. The tutorial contains USIM_NetlistBased_EMIR_Flow a netlist-based EM / IR flow example for the Virtuoso ULTRASIM simulator.

To run USIM_NetlistBased_EMIR_Flow To run USIM_NetlistBased_EMIR_Flow

1. 1. Create a directory called USIM_EMIR. Create a directory called Set USIM_EMIR.

2. 2. Copy the USIM_EMIR_FLOW_OA.tar.gz file to the USIM_EMIR directory from /cnfm/Cadence/MMSIM72/tools/ultrasim/examples/USIM_NetlistBased_EMIR_Flow as shown below. Copy the file to the USIM_EMIR_FLOW_OA.tar.gz USIM_EMIR directory from / cnfm/Cadence/MMSIM72/tools/ultrasim/examples/USIM_NetlistBased_EMIR_Flow as Shown below.

cd USIM_EMIR cd USIM_EMIR
cp –r /cnfm/Cadence/MMSIM72/tools/ultrasim/examples/USIM_NetlistBased_EMIR_Flow/* . cp-r / cnfm/Cadence/MMSIM72/tools/ultrasim/examples/USIM_NetlistBased_EMIR_Flow / *.

3. 3. Untar the USIM_EMIR_FLOW_OA.tar.gz file. Untar the file USIM_EMIR_FLOW_OA.tar.gz.

gunzip USIM_EMIR_FLOW_OA.tar.gz | tar xvf – USIM_EMIR_FLOW_OA.tar.gz gunzip | tar xvf -

4. 4. Follow the instructions in the USIM_EMIR_FLOW_workshop.pdf document. Follow the instructions in the document USIM_EMIR_FLOW_workshop.pdf.

Virtuoso MMSIM Virtuoso MMSIM

~>ultrasim -h ~> ULTRASIM-h

***************************************************************************** ************************************************** ***************************
* *
* Cadence (R) Virtuoso (R) UltraSim (R) Full-Chip Simulator * Cadence (R) Virtuoso (R) ULTRASIM (R) Full-Chip Simulator
* Version 7.1.1.426.isr27 32bit 06/30/2010 01:40 (sfsol73) * Version 06/30/2010 1:40 7.1.1.426.isr27 32bit (sfsol73)
* Copyright (C) 2001-2010, Cadence Design Systems, Inc. * Copyright (C) 2001-2010, Cadence Design Systems, Inc.. All rights reserved worldwide. All rights reserved worldwide.
* Cadence, Virtuoso and UltraSim are registered trademarks of Cadence Design Systems, Inc. * Cadence Virtuoso are registered trademarks and ULTRASIM of Cadence Design Systems, Inc..
* All others are the property of their respective holders. * All Other are the property of Their respective Holders.
* Protected by US Patents: * Protected by US Patents:
* 5,610,847; 5,790,436; 5,812,431; 5,859,785; 5,949,992; 5,987,238; * 5,610,847, 5,790,436, 5,812,431, 5,859,785, 5,949,992, 5,987,238;
* 6,088,523; 6,101,323; 6,151,698; 6,181,754; 6,260,176; 6,278,964; * 6,088,523, 6,101,323, 6,151,698, 6,181,754, 6,260,176, 6,278,964;
* 6,349,272; 6,374,390; 6,493,849; 6,504,885; 6,618,837; 6,636,839; * 6,349,272, 6,374,390, 6,493,849, 6,504,885, 6,618,837, 6,636,839;
* 6,778,025; 6,832,358; 6,851,097; 6,928,626; 7,024,652; 7,035,782; * 6,778,025, 6,832,358, 6,851,097, 6,928,626, 7,024,652, 7,035,782;
* 7,085,700; 7,143,021 * 7,085,700, 7,143,021
* *
* Includes RSA BSAFE(R) Cryptographic or Security Protocol Software from RSA Security, Inc. * Includes RSA BSAFE (R) Cryptographic or Security Protocol Software from RSA Security, Inc..
* *
* USER: lorival HOST: vesa09.lirmm.fr HOSTID: 80990764 PID: 10221 * USER: lorival HOST: vesa09.lirmm.fr HOSTID: 80990764 PID: 10221
* Memory: available: 9.7778 GB physical: 17.1798 GB * Memory: Available: 9.7778 GB physical: 17.1798 GB
* CPU(1 of 8): CPU0 sparcv9 2520Mhz * CPU (1 of 8): CPU0 sparcv9 2520Mhz
* *
* Starting time: Thu Apr 21 17:04:51 2011 * Starting time: Thu Apr 21 2011 5:04:51 p.m.
* *
***************************************************************************** ************************************************** ***************************

Loading /cnfm/Cadence/MMSIM71/tools.sun4v/cmi/lib/5.0/libinfineon_sh.so ... Loading / cnfm/Cadence/MMSIM71/tools.sun4v/cmi/lib/5.0/libinfineon_sh.so ...
Loading /cnfm/Cadence/MMSIM71/tools.sun4v/cmi/lib/5.0/libphilips_sh.so ... Loading / cnfm/Cadence/MMSIM71/tools.sun4v/cmi/lib/5.0/libphilips_sh.so ...
Loading /cnfm/Cadence/MMSIM71/tools.sun4v/cmi/lib/5.0/libsparam_sh.so ... Loading / cnfm/Cadence/MMSIM71/tools.sun4v/cmi/lib/5.0/libsparam_sh.so ...
Loading /cnfm/Cadence/MMSIM71/tools.sun4v/cmi/lib/5.0/libstmodels_sh.so ... Loading / cnfm/Cadence/MMSIM71/tools.sun4v/cmi/lib/5.0/libstmodels_sh.so ...

Usage: ultrasim [-f]<circuit> [Options] Usage: ULTRASIM [-f] <circuit> [Options]

Options: Options:

[-f] circuit - The filename of a circuit netlist [-F] circuit - The filename of a circuit netlist
-h - Prints this help message. -H - Prints this help message.
-info - Prints some system information. -Info - Prints Some system information.
-libpath path - Used to load the shared libraries -Libpath path - Used to load the shared libraries
-log - Do not copy the output messages to a file. -Log - Do not copy the output messages to a file.
+log file - Copy all messages to `file'. + Log file - Copy all messages to `file '.
=log file - Send all messages to `file'. = Log file - Send all messages to `file '.
-raw rawDir - The directory in which all psf files are created -Raw rawda - The directory in Which all psf files are created
-outdir outDir - The directory in which all files are created -Outdir outdir - The directory in Which all files are created
-outname filename - The base filename which should be used when files are created Outname-filename - The filename base Which Should Be Used When files are created
-format fmt - Waveform. data in the format `fmt'. -Format fmt - Waveform. data in the format `fmt '. Possible values for `fmt' are Possible values for `fmt 'are
psf, psfxl, sst2, fsdb, or wdf. psf, psfxl, sst2, fsdb, or wdf. Only one entry allowed. Only one entry Allowed.
-uwifmt name - Multiple waveform. formats, or user defined output format. Uwifmt-name - Multiple waveform. formats, or user defined output format. To To
specify multiple formats, use ':' as a delimiter. Specify multiple formats, use ':' as a delimiter.
+rtsf - Enables the rtsf mode for all the psf files created, and delivers + Rtsf - Enables the mode for all the rtsf psf files created, and Deliveries
improved viewing performance in VIVA. Improved performance in viewing VIVA.
+lqtimeout value - Turns on the queuing for license capability. + Lqtimeout value - Turns on the license for queuing capability. You have to set how long You Have To set how long
to wait for a license (value is in seconds). to wait for a license (value is in seconds). Default value is 900 sec. Default value is 900 sec.
Specifying value 0 means wait until license is available. Specifying value 0 means clustering license Wait Until est disponible. You may use May you use
`+lqt' as an abbreviation of `+lqtimeout'. LQT `+ 'as abbreviation of` + year lqtimeout'.
+lsuspend - Turns on the license suspend/resume capability. Lsuspend + - Turns on the license suspend / resume capability. When UltraSim receives SIGTSTP, When ULTRASIM Receives SIGTSTP,
it will check in all the licenses before it gets suspended. It Will check in all the licenses Before It Gets Suspended. The licenses will The licenses Will
be checked out again when SIGCONT is received. Be checked out again When SIGCONT Received IS. You may use `+lsusp' as an May you use `+ lsusp ace year
abbreviation of `+lsuspend'. abbreviation of `+ lsuspend '.
+lorder - Check for a license in the specified order. Lorder + - Check for a license in the specified order. Use ':' between the Use ':' Between the
license feature names when defining the order. license feature names When Defining the order.
-top subckt - To create a top level instance of the subckt. Subckt-top - To create a top level instance of the subckt.
-V - Display the version -V - version Display the
-W - Display the sub-version -W - Display the sub-version
-I dir - Search directory `dir' for include files. -I dir - search directory `dir 'for include files.
-cmd cmdfile - The command file for interactive. Cmdfile-cmd - The command line for interactive.
-i - Option invokes interactive shell. -I - Option Invokes interactive shell.
-cmiconfig - Read file for information to modify the existing CMI configuration. -Cmiconfig - Read file for information to modify the Existing CMI configuration.

Netlist format options: Netlist format options:

-spectre - The circuit netlist in Spectre format. -Spectrum - The circuit netlist in Spectre format.
-vlog Verilog_file - The circuit netlist in Verilog format. Verilog_file-vlog - The circuit netlist in Verilog format.

Static power grid solver options: Static power grid solver options:

-r file - Enables the static power grid solver. -R file - Enables the static power grid solver. Check the manual for a detailed description. Check the manual for A detailed description.
-rout - Enables the static power grid solver postlayout feature. -Route - Enables the static power grid solver postlayout feature.

Check the manual for a detailed description. Check the manual for A detailed description.

Available components: Available components:

a2d assert atft b3soipd bht bht0 bit A2D assert atft b3soipd bht bht0 bit
bjt bjt301 bjt3500 bjt3500t bjt500 bjt500t bjt503 BJT bjt301 bjt3500 bjt3500t bjt500 bjt500t bjt503
bjt504 bjt504t bjt_table bjtd3500 bjtd3500t bjtd504 bjtd504t bjt504 bjt504t bjt_table bjtd3500 bjtd3500t bjtd504 bjtd504t
bsim1 bsim2 bsim3 bsim3v3 bsim4 bsimsoi bulkmg bsim1 bsim2 bsim3 bsim3v3 bsim4 bsimsoi bulkmg
capacitor cccs ccvs cktrom ctm d2a delay CCCS capacitor ccvs cktrom ctm D2A delay
dio500 diode ekv ekv3 ekv3_nqs ekv3_r4 ekv3_rf dio500 diode EKV ekv3 ekv3_nqs ekv3_r4 ekv3_rf
ekv3_s fourier gaas hbt hisim2 hisim_hv hvmos ekv3_s fourier GaAs HBT hisim2 hisim_hv hvmos
ibis_buffer inductor intcap iprobe isource jfet juncap ibis_buffer inductor intcap iProbe iSource JFET juncap
juncap200 juncap_eldo ldmos mos0 mos1 mos1000 mos1100 juncap200 juncap_eldo LDMOS mos0 MOS1 mos1000 mos1100
mos1100e mos11010 mos11010t mos11011 mos11011t mos1101e mos1101et mos1100e mos11010 mos11010t mos11011 mos11011t mos1101e mos1101et
mos11020 mos11020t mos11021 mos11021t mos1102e mos1102et mos15 mos11020 mos11020t mos11021 mos11021t mos1102e mos1102et mos15
mos2 mos2001 mos2001e mos2001et mos2001t mos2002 mos2002e MoS2 mos2001 mos2001e mos2001et mos2001t mos2002 mos2002e
mos2002et mos2002t mos3 mos30 mos3002 mos3100 mos3100t mos2002et mos2002t mos3 mos30 mos3002 mos3100 mos3100t
mos40 mos40t mos7 mos705 mos902 mos903 mosvar mos40 mos40t mos7 mos705 mos902 mos903 mosvar
msline mtline mutual_inductor nodcap node nport paramtest msline mtline mutual_inductor nodcap node NPort paramtest
pattern pcccs pccvs phy_res port psitft psp1020 SCCP port pattern pccvs phy_res psitft psp1020
psp1021 psp102e psp103 pspnqs1020 pspnqs1021 pspnqs102e pspnqs103 psp1021 psp102e psp103 pspnqs1020 pspnqs1021 pspnqs102e pspnqs103
pvccs pvcvs quantity r3 rdiff relay resistor CPVC pvcvs quantity r3 rdiff relay resistor
scccs sccvs soimg spmos svccs svcvs switch CCS SCCV soimg spmos CAVS svcvs switch
tline tom2 tom3 transformer vbic vccs vcvs TLINE TOM2 tom3 transform. vbic VCCS vCVS
vsource zcccs zccvs zvccs zvcvs VSource zcccs zccvs ZVCC zvcvs

Components marked with * are loaded from shared objects Components marked with an asterisk * are loaded from shared objects

Available analyses/controls: Available analyzes / controls:
.usim_opt . Usim_opt

Other available topics: Other available topics:
circuit_option circuit_option