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What do vdsat and vod mean?

已有 3249 次阅读| 2018-5-11 13:47 |个人分类:design experience|系统分类:芯片设计

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We can see the parameter Vdsat in Cadence Spectre after we perform. the DC simulation. But I can't figure out what's the physical meaning of it?

I guess the vdsat is the overdrive voltage at first, but it's not exact the same as Vgs-Vth. The Vdsat is smaller than Vgs-Vth. So anyone has the idea what is Vdsat is the saturation drain voltage.

for a long channel device, Vdsat almost equal to Vgs- Vth ( Vdsat = Vgs -Vth).

in strong inversion region(Vgs>Vth): NMOSFET works in linear region when 0<Vds<Vdsat. when Vds is small (i.e., Vds <<Vgs -Vth ), the inversion channel behaves like a simple resistor. The drain current Ids increases linearly as the drain voltage Vds increases. However, when Vds is larger it will cause an increase of the voltage in the inversion layer at all points along the channel (except for the singular point at the source edge). This reduces the voltage across the gate capacitor and the inversion charge density is reduced. The smaller amount of mobile inversion charges results in a decrease in channel conductance, which leads to a smaller slope in the Ids -Vds characteristics as Vds increases. Eventually, Vds reaches the saturation voltage Vdsat , at which point the mobile carriers at the drain side disappear in this first order model, and the channel is "pinched off" at the drain side [2.4, 2.6]. The condition of no mobile carriers at the pinch-off point has traditionally been used to obtain the analytical saturation voltage expressions for long channel compact models.

NMOSFET works in saturation region when Vdsat<Vds<Vbk. When Vds>Vdsat, the pinched-off region of the channel increases and extends towards the source. The excess drain voltage beyond Vdsat will drop across this pinched-off region and the drain current remains approximately constant. However, we need to point out that the constant saturation current behavior. is only an approximation. The small but non-zero slope of the Ids -Vds characteristics in the saturation region is very important to Analog circuit performance and must be accurately modeled by a compact model. In addition to the finite length of the pinch-off region (channel length modulation), drain induced barrier lowering and substrate current induced body effect must be accounted for in modeling the current in the saturation region.

for a short channel device, Vdsat = (Vgs -Vth)//(L*Esat)<Vgs -Vth.

(Esat is the saturate Electircal field of device,you can get it from model parameter Vsat=u*Esat/2)

so the device enters saturation before Vds reaches Vgs – Vth and operates more often in saturation.

critical gate voltage, at which an inversion layer is formed, is called the threshold voltage (Vth ).When the voltage between the gate and source, Vgs , is larger than Vth by several times the thermal voltage vt (KBT/q), the device is said to be in the strong inversion regime. When Vgs=Vdd (the power supply voltage), the device is in the “on” state. When Vgs is less than Vth , the device is in the subthreshold (or weak inversion) regime. When Vgs = 0, the device is in the “off” state. When Vgs is biased near Vth , the device operates in the moderate inversion egime,which is an important operation region in low power analog applications.

补一些中文的解释
[#k)h/A+V{L0Vov=Vgs-Vth,用MOS的Level 1 Model时，不考虑短沟道效用，Vdsat=Vov=Vgs-Vth,当Vds>Vdsat时，MOS的沟道就出现Pich-off现象，这时候电流开始饱和。

p3D'W.v{_J4}0

6?Cy3G#M5b(g"V0但是考虑到短沟道效应的模型里，沟道里的多子因为速度饱和效应（Velocity saturation），Vds不需要到达Vov，只要到达Vdsat，Ids就会饱和，不会再上升。但是此时在物理上，沟道并未达到Pinch-off，直到Vds=Vov，沟道的Pinch-off现象才会出现。也就是说在短沟道模型中，器件在沟道Pinch-off之前就会达到速度饱和，电流不会再增加。
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&E2cQ:wor(?a0从上面这段话来理解，长沟道NMOS，Vdsat=Vov，短沟道NMOS，Vdsat<Vov (这经常被验证)。但是实际中Vdsat>Vov也是存在的，比如下面的仿真结果（vod即vov，Model用的PTM 180nm CMOS）：

subckt
element 0:mm9      0:mm8      0:mm3      0:mm2      0:mm1
model    0:pch      0:pch      0:nch      0:nch      0:nch
region     Saturati   Saturati   Saturati   Saturati   Saturati
C)M)e!Q,E[0 id       -97.7232u -97.7232u   97.7232u   97.7232u 195.4464u
ibs        0.         0.         0.         0.         0.
ibd        0.         0.         0.         0.         0.
vgs     -662.5582m -662.5582m 719.7361m 719.7361m 682.0000m
vds     -662.5582m -662.5582m 923.1779m 923.1779m 214.2639m
vbs        0.         0.      -214.2639m -214.2639m    0.
0T&X(iv~P+J }\.q0 vth     -477.7299m -477.7299m 594.0999m 594.0999m 542.3457m
4S4]/J_/tIaH0 vdsat   -144.0449m -144.0449m 138.4285m 138.4285m 145.7596m
vod     -184.8283m -184.8283m 125.6362m 125.6362m 139.6543m
beta       6.2412m    6.2412m    9.4052m    9.4052m   19.4537m
s)F^6t^'?v0 gam eff 556.0000m 556.0000m 540.1241m 540.1241m 542.2548m
gm         1.0397m    1.0397m    1.0353m    1.0353m    1.9850m
5l u7~L+~Uw0 gds       39.7854u   39.7854u   26.4210u   26.4210u 104.0814u
E4\Bw}/e0 gmb      238.1315u 238.1315u 269.8618u 269.8618u 566.3429u
Gam~y)hB_ H@5^0 cdtot     12.6280f   12.6280f    4.1194f    4.1194f    9.0130f
R$Zu{8tWA#M{0 cgtot     64.5645f   64.5645f   20.4565f   20.4565f   41.5924f
M;Th3b6@3O$pCSsx0 cstot     50.7008f   50.7008f   16.2909f   16.2909f   33.2023f
IarjTT4]0 cbtot     11.3538f   11.3538f    3.3674f    3.3674f    7.5160f
-y!F#[&_ A kpM-}`0 cgs       48.1820f   48.1820f   15.4117f   15.4117f   30.9465f
O6U#@-^%|v._8^c t0 cgd       12.6073f   12.6073f    4.0569f    4.0569f    8.5531f
3R2L!H7KAu0
6uF0h^b6{2V(j?0原因尚未深究
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In weak inversion region, the MOS operates like a bipolar transistor much more. When the vds is greater than vdsat, the Ids is very flat. In other word, the MOS is in saturation region.
'?&Dsry:O1m0
In [Grey and Meyer], it states that the drain current is almost constant when Vds>3VT (VT=kT/q). So the minimum vds required to force the transistor to operate as a current source in weak inversion is independent of the overdrive. At 300K, 3VT ≈75 mV. That is a relative coarse but reliable value.

REFERENCE1. MOSFET Modeling and BSIM3 user's Guide, 1999.