###################group path

set n0scan_cells {

cpg/ucpg_cgtt_local_1r2d/uCGTT_LOCAL/u_cgtt_dclk0/n0scan_active_d1_reg

bpm/n0scan_cgcg_Cpl_GFXCLK_en_reg

bpm/n0scan_aon_Cpl_GFXCLK_en_reg

bpm/rm_didt_ff_reg

}

create_bound -boundary {{12.3690 115.6800} {26.3910 129.1200}} -type hard -name n0scan [get_cells $n0scan_cells]

set cells1 {

cpg/ucpg_rbiu/qGRBM_CP_byp_send_regAMD_REPLICATE1_MB_qReadState_regAMD_REPLICATE1

cpg/ucpg_rbiu/ucpg_rbiu_fifo_arb/qArbSel_reg_0__MB_qArbSel_reg_0_AMD_REPLICATE1

}

set current_sce [current_scenario *tt0p9v*]

foreach_in_collection scenario [get_scenarios *setup*Func*] {

    current_scenario $scenario

group_path -name GFX_CLK_1m -weight 2 -priority 2 -critical_range 10 -from  cpg/ucpg_me/ucpg_me_instr_cache/cpg_instr_cache_miss_return_queue/qRdData_reg_* -to cpg/ucpg_me/ucpg_me_instr_cache/ucpg_pfp_f32x64mt_instr_cache/ucpg_mem1pNx128lg/genip_mem/mem_*/vl_wr_gc_cpg_t1_sms_wrap_rfsp1p5rmlvt512x128m2k2l_*/U_rfsp1p5rmlvt512x128m2k2l/WE

group_path -name GFX_CLK_1r -weight 2 -priority 2 -critical_range 10 -from  cpg/ucpg_me/ucpg_me_instr_cache/cpg_instr_cache_miss_return_queue/qRdData_reg_* -to cpg/ucpg_me/ucpg_me_instr_cache/*_reg_*

group_path -name GFX_CLK_2r -weight 2 -priority 2 -critical_range 10 -from  cpg/ucpg_pfp/ucpg_pfp_parser/uf32x64mt_pfp/uf32x64mt_if_id_icache_unit/icache_thread1_uf32x64mt_if_id_icache_thread1/qInstrPntr_reg_* -to [get_cells [all_registers ] -filter "name !~ *latch*"]

group_path -name GFX_CLK_3r -weight 2 -priority 2 -critical_range 10 -from  cpg/ucpg_roq/ucpg_roq_cmd_queues/qRoQueueData_reg_*_ -to [get_cells [all_registers ] -filter "name !~ *latch*"]

group_path -name GFX_CLK_4r -weight 2 -priority 2 -critical_range 10 -from  cpg/ucpg_me/ucpg_me_parser/uf32x64mt_me/uf32x64mt_if_id_icache_unit/uf32x64mt_if_id_icache_thread0/qInstrPntr_reg_* -to [get_cells [all_registers ] -filter "name !~ *latch*"]

group_path -name GFX_CLK_5r -weight 2 -priority 2 -critical_range 10 -from  cpg/ucpg_pfp/ucpg_pfp_parser/uf32x64mt_pfp/uf32x64mt_if_id_icache_unit/icache_thread1_uf32x64mt_if_id_icache_thread1/*_reg_* -to [get_cells [all_registers ] -filter "name !~ *latch*"]

group_path -name GFX_CLK_6r -weight 2 -priority 2 -critical_range 10 -from  cpg/ucpg_me/ucpg_me_parser/uf32x64mt_me/uf32x64mt_if_id_icache_unit/icache_thread1_uf32x64mt_if_id_icache_thread1/*_reg_* -to [get_cells [all_registers ] -filter "name !~ *latch*"]

group_path -name GFX_CLK_7r -weight 2 -priority 2 -critical_range 10 -from  cpg/ucpg_pfp/ucpg_pfp_instr_cache/*/qRdData_reg_* -to [get_cells [all_registers ] -filter "name !~ *latch*"]

group_path -name GFX_CLK_8r -weight 2 -priority 2 -critical_range 10 -from  cpg/ucpg_rbiu/qGRBM_CP_byp_send_reg_* -to [get_cells [all_registers ] -filter "name !~ *latch*"]

group_path -name GFX_CLK_9r -weight 2 -priority 2 -critical_range 10 -from  cpg/ucpg_me/ucpg_me_instr_cache/ucp_cpg_ic_miss_request_queue/qRdData_reg_*_* -to [get_cells [all_registers ] -filter "name !~ *latch*"]

group_path -name GFX_CLK_10r -weight 2 -priority 2 -critical_range 10 -from [get_cells $cells1] -to [get_cells [all_registers ] -filter "name !~ *latch*"]

group_path -name GFX_CLK_2c -weight 2 -priority 2 -critical_range 10 -from  cpg/ucpg_pfp/ucpg_pfp_parser/uf32x64mt_pfp/uf32x64mt_if_id_icache_unit/icache_thread1_uf32x64mt_if_id_icache_thread1/qInstrPntr_reg_* -to [get_cells -hier -f "is_integrated_clock_gating_cell == true"]

group_path -name GFX_CLK_3c -weight 2 -priority 2 -critical_range 10 -from  cpg/ucpg_roq/ucpg_roq_cmd_queues/qRoQueueData_reg_*_ -to [get_cells -hier -f "is_integrated_clock_gating_cell == true"]

group_path -name GFX_CLK_4c -weight 2 -priority 2 -critical_range 10 -from  cpg/ucpg_me/ucpg_me_parser/uf32x64mt_me/uf32x64mt_if_id_icache_unit/uf32x64mt_if_id_icache_thread0/qInstrPntr_reg_* -to [get_cells -hier -f "is_integrated_clock_gating_cell == true"]

group_path -name GFX_CLK_5c -weight 2 -priority 2 -critical_range 10 -from  cpg/ucpg_pfp/ucpg_pfp_parser/uf32x64mt_pfp/uf32x64mt_if_id_icache_unit/icache_thread1_uf32x64mt_if_id_icache_thread1/*_reg_* -to [get_cells -hier -f "is_integrated_clock_gating_cell == true"]

group_path -name GFX_CLK_6c -weight 2 -priority 2 -critical_range 10 -from  cpg/ucpg_me/ucpg_me_parser/uf32x64mt_me/uf32x64mt_if_id_icache_unit/icache_thread1_uf32x64mt_if_id_icache_thread1/*_reg_* -to [get_cells -hier -f "is_integrated_clock_gating_cell == true"]

group_path -name GFX_CLK_7c -weight 2 -priority 2 -critical_range 10 -from  cpg/ucpg_pfp/ucpg_pfp_instr_cache/*/qRdData_reg_* -to [get_cells -hier -f "is_integrated_clock_gating_cell == true"]

group_path -name GFX_CLK_8c -weight 2 -priority 2 -critical_range 10 -from  cpg/ucpg_rbiu/qGRBM_CP_byp_send_reg_* -to [get_cells -hier -f "is_integrated_clock_gating_cell == true"]

group_path -name GFX_CLK_9c -weight 2 -priority 2 -critical_range 10 -from  cpg/ucpg_me/ucpg_me_instr_cache/ucp_cpg_ic_miss_request_queue/qRdData_reg_*_* -to [get_cells -hier -f "is_integrated_clock_gating_cell == true"]

group_path -name GFX_CLK_10c -weight 2 -priority 2 -critical_range 10 -from [get_cells $cells1] -to [get_cells -hier -f "is_integrated_clock_gating_cell == true"]

group_path -name n0scan -weight 1 -priority 1 -critical_range 1  -to [get_cells $n0scan_cells]

group_path -name FCFPRepFF -weight 1 -priority 1 -critical_range 1  -from FCFPRepFF* -to FCFPRepFF*

}

current_scenario $current_sce

set_path_margin 100 -from FCFPRepFF* -to FCFPRepFF*

set_path_margin 200 -to [get_cells $n0scan_cells]

######################BLK

source -e -v /home/gli1/script/tmac_rg.tcl

####

set all_tmacs [get_flat_cells -all -quiet *_PUSHDOWN]

if { [sizeof_collection $all_tmacs] > 0 } {

   set num 0

   foreach_in_collection each $all_tmacs {

       set bbox_rblk [get_attribute $each boundary_bbox]

       create_routing_guide -name RG_TMAC_$num  -boundary $bbox_rblk -horizontal_track_utilization 50 -vertical_track_utilization 50 

       incr num

   }

}

######

###################

catch {sh rm data/placeblk.tcl}

foreach_in_collection cell [all_macro_cells] {

        set llx [expr [lindex [lindex [get_attr $cell boundary_bbox] 0] 0] - 5]

        set lly [expr [lindex [lindex [get_attr $cell boundary_bbox] 0] 1] - 5]

        set urx [expr [lindex [lindex [get_attr $cell boundary_bbox] 1] 0] + 5]

        set ury [expr [lindex [lindex [get_attr $cell boundary_bbox] 1] 1] + 5]

        echo "create_placement_blockage -type partial  -blocked_percentage  30 -bbox {{$llx $lly} {$urx $ury}}" >> data/placeblk.tcl

        source data/placeblk.tcl

}