日志
奇数分频-3分频/5分频
| ||
module TEST_oddPLL(
input clkin,
output clkout
);
/*3分频
reg [1:0] step1, step;
always @(posedge clkin)
begin
case (step)
2'b00 : step<=2'b01;
2'b01 : step<=2'b10;
2'b10 : step<=2'b00;
default : step<=2'b00;
endcase
end
always @(negedge clkin)
begin
case (step1)
2'b00 : step1<=2'b01;
2'b01 : step1<=2'b10;
2'b10 : step1<=2'b00;
default : step1<=2'b00;
endcase
end
assign clkout=~(step[1]|step1[1]);
*/
//5分频
reg [2:0] step1, step2;
always @(posedge clkin )
begin
case (step1)
3'b000: step1<=3'b001;
3'b001: step1<=3'b011;
3'b011: step1<=3'b100;
3'b100: step1<=3'b010;
3'b010: step1<=3'b000;
default:step1<=3'b000;
endcase
end
always @(negedge clkin )
begin
case (step2)
3'b000: step2<=3'b001;
3'b001: step2<=3'b011;
3'b011: step2<=3'b100;
3'b100: step2<=3'b010;
3'b010: step2<=3'b000;
default:step2<=3'b000;
endcase
end
assign clkout=step1[0]|step2[0];
endmodule
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