always @ ( * )

or any other combination of the characters @ ( * ) with or without white space, the author prefers the first
and most abbreviated style. To the author, "always @*" clearly denotes that a combinational block of logic follows.
The Verilog-2001 "always @*" coding style. has a number of important advantages over the more cumbersome Verilog-1995 combinational sensitivity list coding style.:
·  Reduces coding errors - the code informs the simulator that the intended implementation is
combinational logic, so the simulator will automatically add and remove signals from the sensitivity
list as RTL code is added or deleted from the combinational always block. The RTL coder is no longer
burdened with manually insuring that all of the necessary signals are present in the sensitivity list. This
will reduce coding errors that do not show up until a synthesis tool or linting tool reports errors in the
sensitivity list. The basic intent of this enhancement is to inform. the simulator, "if the synthesis tool
wants the signals, so do we!"
·  Abbreviated syntax - large combinational blocks often meant multiple lines of redundant signal
naming in a sensitivity list. The redundancy served no appreciable purpose and users will gladly adopt
the more concise and abbreviated @* syntax.
·  Clear intent - an always @* procedural block informs the code-reviewer that this block is intended to
behave like, and synthesize to, combinational logic.

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