Q:

We can see the parameter Vdsat in Cadence Spectre after we perform. the DC simulation. But I can't figure out what's the physical meaning of it?

I guess the vdsat is the overdrive voltage at first, but it's not exact the same as Vgs-Vth. The Vdsat is smaller than Vgs-Vth. So anyone has the idea what is Vdsat is the saturation drain voltage.

for a long channel device, Vdsat  almost equal to Vgs- Vth ( Vdsat = Vgs -Vth).

in strong inversion region(Vgs>Vth): NMOSFET works in linear region when 0<Vds<Vdsat. when Vds is small (i.e., Vds <<Vgs -Vth ), the inversion channel behaves like a simple resistor. The drain current Ids increases linearly as the drain voltage Vds increases. However, when Vds is larger it will cause an increase of the voltage in the inversion layer at all points along the channel (except for the singular point at the source edge). This reduces the voltage across the gate capacitor and the inversion charge density is reduced. The smaller amount of mobile inversion charges results in a decrease in channel conductance, which leads to a smaller slope in the Ids -Vds characteristics as Vds increases. Eventually, Vds reaches the saturation voltage Vdsat , at which point the mobile carriers at the drain side disappear in this first order model, and the channel is "pinched off" at the drain side [2.4, 2.6]. The condition of no mobile carriers at the pinch-off point has traditionally been used to obtain the analytical saturation voltage expressions for long channel compact models.

NMOSFET works in  saturation region when Vdsat<Vds<Vbk. When Vds>Vdsat, the pinched-off region of the channel increases and extends towards the source. The excess drain voltage beyond Vdsat will drop across this pinched-off region and the drain current remains approximately constant. However, we need to point out that the constant saturation current behavior. is only an approximation. The small but non-zero slope of the Ids -Vds characteristics in the saturation region is very important to Analog circuit performance and must be accurately modeled by a compact model. In addition to the finite length of the pinch-off region (channel length modulation), drain induced barrier lowering and substrate current induced body effect must be accounted for in modeling the current in the saturation region.

for a short channel device, Vdsat = (Vgs -Vth)//(L*Esat)<Vgs -Vth.

so the device enters saturation before Vds reaches Vgs – Vth and operates more often in saturation.

critical gate voltage, at which an inversion layer is formed, is called the threshold voltage (Vth ).When the voltage between the gate and source, Vgs , is larger than Vth by several times the thermal voltage vt (KBT/q), the device is said to be in the strong inversion regime. When Vgs=Vdd (the power supply voltage), the device is in the “on” state. When Vgs is less than Vth , the device is in the subthreshold (or weak inversion) regime. When Vgs = 0, the device is in the “off” state. When Vgs is biased near Vth , the device operates in the moderate inversion egime,which is an important operation region in low power analog applications.

REFERENCE1. MOSFET Modeling and BSIM3 user's Guide, 1999.