#======================================
#step 1: logical library settings
#======================================
#set SEARCH_PATH "/home/xiaff/ftp"
#set TARGET_LIBRARY_FILES IC05CScore_33_typ.db
#set LINK_LIBRARY_FILES IC05CScore_33_typ.db
#set SYMBOL_LIBRARY_FILES IC05CScore.sdb
#set_app_var search_path $SEARCH_PATH
#set_app_var target_library $TARGET_LIBRARY_FILES
#set_app_var link_library $LINK_LIBRARY_FILES
#set_app_var symbol_library $SYMBOL_LIBRARY_FILES
#======================================
#step 1: read & elaborate the RTL file list
#======================================
set TOP_MODULE sha_256_top
analyze -format
verilog [list shazushu.v sha_256_top.v haxi256_3.v]
elaborate $TOP_MODULE -architecture verilog
current_design $TOP_MODULE
if {[link] ==0}{
echo "link with error!";
exit;
};
if {[check_design] ==0}{
echo "check design with error!";
exit;
};
#======================================
#step 2 :reset design first
#======================================
reset_design
#======================================
# step 4 :define clock
#======================================
set CLK_NAME clk
set CLk_PERIOD 50
set CLk_SKEW [expr $CLk_PERIOD*0.05]
set CLk_TRAN [expr $CLk_PERIOD*0.01]
set CLk_SRC_LATENCY [expr $CLk_PERIOD*0.1]
set CLk_LATENCY [expr $CLk_PERIOD*0.1]
create_clock -period $CLk_PERIOD [get_ports $CLK_NAME]
set_ideal_network [get_ports $CLK_NAME]
set_dont_touch_network [get_ports $CLK_NAME]
set_drive 0 [get_ports $CLK_NAME] #驱动能力无穷大
set_clock_uncertainty -setup $CLK_SKEW [get_clocks $CLK_NAME]
set_clock_transition -max $CLK_tran [get_clocks $CLK_NAME]
set_clock_latency -source -max $CLK_SRC_LATENCY [get_clocks $CLK_NAME] #PCB板子引脚到芯片延迟
set_clock_latency -max $CLK_SRC_LATENCY [get_clocks $CLK_NAME] #芯片引脚到触发器延迟
#======================================
#step 5 :set reset
#======================================
set RST_NAME rst_l_i
set_ideal_network [get_ports $RST_NAME]
set_dont_touch_network [get_ports $RST_NAME]
set drive 0 [get_ports $RST_NAME]
#======================================
# step 6:set input delay(using timing budget)
#======================================
#set LIB_NAME CSMC05DPTMHD_FBlib_V71
#set WRITE_LOAD_MODEL csm18_wll0
#set DRIVE_CELL INVX1
#set DRIVE_PIN Y
#set OPERA_CONDITIONAL ss_1p62v_125c
set ALL_IN_EXCEPT_CLK [remove_from_collection [all_inputs][get_ports $CLK_NAME]]
set INPUT_DELAY [expr $CLk_PERIOD*0.6]
set_input_delay $INPUT_DELAY -clock $CLK_NAME $ALL_IN_EXCEPT_CLK
#set_drving_cell -lib_cell $(DRIVE_CELL) -pin ${DRIVE_PIN} $ALL_IN_EXCEPT_CLK
#======================================
#step 7:set output delay
#======================================
set OUTPUT_DELAY [expr $CLk_PERIOD*0.6]
#set MAX_LOAD [expr [load of $LIB_NAME/INVX8/A]*10]
set_output_delay $OUTPUT_DELAY -clock $CLK_NAME [all_outputs]
set_load [expr $MAX_LOAD*3] [all_outputs]
set_isolate_ports -type buffer [all_outputs]
#======================================
#step 8:set max delay for comb logic
#======================================
#set_input_delay [expr $CLk_PERIOD*0.1] -clock $CLK_NAME -add_delay [get_ports a_i]
#set_output_delay [expr CLk_PERIOD*0.1] -clock $CLK_NAME -add_dealy [get_ports y_o]
#======================================
#step 9:set operating condition &write load model
#======================================
#set_operating_conditions -max $OPERA_CONDITION \
# -max_library $LIB_NAME
set auto_wire_load_selection false
#======================================
#step 16: generate report files
#======================================
redirect -tee -file ${/home/xiaff/ftp/fullctrl/sha/sha_report_jiaoben}/check_design.txt {check_design}
redirect -tee -file ${/home/xiaff/ftp/fullctrl/sha/sha_report_jiaoben}/check_timing.txt {check_timing}
redirect -tee -file ${/home/xiaff/ftp/fullctrl/sha/sha_report_jiaoben}/report_constraint.txt {report_constraint -all_violators}
redirect -tee -file ${/home/xiaff/ftp/fullctrl/sha/sha_report_jiaoben}/check_setup.txt {report_timing -delay_type max}
redirect -tee -file ${/home/xiaff/ftp/fullctrl/sha/sha_report_jiaoben}/check_hold.txt {report_timing -delay_type min}
redirect -tee -file ${/home/xiaff/ftp/fullctrl/sha/sha_report_jiaoben}/report_area.txt {report_area}