日志
icc flow
| |
Preparing the Design
• Setting Up the Libraries
• Reading the Design
• Setting the Working Design
• Annotating the Floorplan Information
• Annotating the Scan Chain Information
• Specifying the Power Intent
• Validating the Design
• Creating Logical Power and Ground Connections
• Setting Up for Power Optimization
• Setting Up for Multicorner-Multimode Analysis and Optimization
• Preparing for Timing Analysis and RC Calculation
• Linking Designs
Placement and Optimization
• Preparing for Placement and Optimization
• Performing Placement and Optimization
• Analyzing Placement and Optimization Results
• Fine-Tuning the Placement and Optimization Results
Clock Tree Optimization
• Prerequisites for Clock Tree Synthesis
• Handling Multivoltage Designs
• Handling Multicorner-Multimode Designs
• Handling Hierarchical Designs
• Analyzing the Clock Trees
• Defining the Clock Trees
• Specifying Clock Tree Exceptions
• Handling Integrated Clock-Gating Cells
• Balancing Multiple Clocks
• Specifying the Clock Tree References
• Specifying Clock Tree Synthesis Options
• Specifying Clock Tree Optimization Options
• Inserting User-Specified Clock Trees
• Handling Existing Clock Trees
• Verifying the Clock Trees
• Implementing Clock Trees
• Implementing Clock Meshes
• Implementing Multisource Clock Trees
• Analyzing the Clock Tree Results
• Fine-Tuning the Clock Tree Synthesis Results
• Analyzing and Refining the Design
Routing using Zroute
• Zroute Features
• Basic Zroute Flow
• Prerequisites for Routing
• Creating Design-Specific Via Masters
• Checking Routability
• Setting Routing Constraints
• Setting Routing Options
• Routing Clock Nets
• Routing Critical Nets
• Routing Secondary Power and Ground Pins
• Routing Signal Nets
• Performing Focal Optimization
• Performing Final Stage Leakage-Power Recovery
• Performing ECO Routing
• Cleaning Up Routed Nets
• Saving the Routing Information
• Analyzing the Routing Results
• Routing Nets and Buses in the GUI
• Postroute RC Extraction
Chip Finishing and Design for Manufacturing
• Overview
• Inserting Tap Cells
• Finding and Fixing Antenna Violations
• Inserting Redundant Vias
• Optimizing Wire Length and Via Count
• Reducing Critical Areas
• Shielding Nets
• Inserting Filler Cells
• Inserting Metal Fill
/2 
eetop公众号
创芯大讲堂
创芯人才网