试了一下,好像基本功能是OK的。深度为8
parameter DATA_WIDTH = 8 ;
parameter DATA_DEPTH = 8;
parameter DATA_PTR_WIDTH = 3
;
reg[DATA_PTR_WIDTH-1 :0] counter_rd
;
reg[DATA_PTR_WIDTH-1 :0]
counter_wt ;
wire[DATA_PTR_WIDTH-1:0] counter_rd_tmp;
wire counter_rd_zero;
wire ptr_eq;
wire ptr_eq_tmp;
空的判断
读指针 == 写指针
assign ptr_eq
= !(counter_rd ^ counter_wt);
assign empty = ptr_eq ? 1'b1 : 1'b0;
满的判断
[深度为8]
1. 写指针在前:读指针在 0,而写指针在7
2. 读指针在前:即写指针已写满
fifo一次后,再次追上了读指针
assign counter_rd_zero = & ((~counter_rd) &
counter_wt);
assign
counter_rd_tmp = counter_rd >> 1;
assign
ptr_eq_tmp = !(counter_rd_tmp ^ counter_wt);
assign full =
counter_rd_zero ? 1'b1 : ptr_eq ? 1'b0 : ptr_eq_tmp;