Typically in verification flow, we do code coverage, but doing code coverage shows only if all the lines of the DUT is executed, if all the possible cases of a expression are covered. Which is kind of ok to start with, but it is no way good for saying that verification is completed.

For declaring a verification to be complete we need to check also if all the functions of DUT are tested or not. Like to say if read followed by write to same address of a memory did it happen or to say if 64 Bytes packets happened when port mirroring is enabled.

Typically when we start documenting test cases in test plan document, we also start documenting functional coverage plan. So when we start coding testbench, we code coverage along testbench. Vera language gives very good set of features that are useful in measuring coverage.

There are 4 places where functional coverage points can be coded in a verification enviroment, and they can be classfied as

• F1 : Functional coverage points are very near the randomization
• F2 : Functional coverage points are sampled at input interface of DUT
• F3 : Functional coverage points which sample internal DUT states
• F4 : Functional coverage points which sample output interface of DUT

Below figure shows all the 4 types.

These set of coverage points are coded in class which is instantiated very near to the randomization and it is before actual BFM/driver to DUT. There is problem with F1 type coverage points. Assume for some reason, BFM/Driver is not able to send randomizated object to DUT, even then functiona coverage gets updated. This is not acceptable.

These set of coverage points are coded in class which is instantiated inside a input monitor or coverage class itself will have ablitiy to sample the DUT input signals. This is perfect for having functional coverage on stimulus that DUT is being driven with,

These set of coverage points are coded in class which is instantiated as standalone class, and it monitors the internal states of DUT, like FSM states, or some registers. I have rarely come across these kind of coverage points. Also with advent of SVA cover properties, I see little use of F3 functional coverage types.

These set of coverage points are coded in class which is instantiated inside a output monitor or coverage class itself will have ablitiy to sample the DUT output signals. This is perfect for having functional coverage on output of DUT,