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zobovision(深圳)_heif_heic_encoder_FPGA_ASIC_IP

已有 281 次阅读| 2023-7-3 14:23 |个人分类:视频图片编解码FPGA/ASIC IP|系统分类:芯片设计

zobovision

HEIF/heic image Encoder FPGA/asic IP

■ HEIF/heic Encoder, HEVC/H.265 Standard

■ RTL or Netlist authorization

■ FPGA or ASIC/SOC IP

■ Ultra-large image size, up to 32k*32k

■ yuv420/8bit (Default), yuv422/yuv444/10bit (Optional)

■ Zero-latency bitstream output by ultra fast real-time CABAC encoding

■ Constant encoding speed, linear with image size

■ Same image size, Same encoding cycle, independent of quality settings

■ External memory free, No DDRx required

■ Standalone, No Processors requried

■ 1080p@60fps/1ip or 4K@15fps/1ip capability on FPGA platform

■ <10% compression ratios losses compare with the bestest software encoder

■ logic resource: ~100K Luts (xilinx FPGA)

■ fmax: ~280Mhz (xilinx FPGA)