1.What does Global Routing do in congested areas?
It routes around the congestion by moving nets out of gcells to less congested gcells.
2.Assignment of nets to metal layers is done during the Track Assignment stage. T or F?
False. This is done during Global Route.
3.When does IC Compiler user SBoxes? Are they always the same size?
During detail route and S&R. Size is fixed for DR and changes for each S&R loop. Sbox sizes vary from design to design,and are not controllable by the user.
4.Does IC Compiler find all the DRC violations, making a Hercules or other sign-off level DRC extraction run unnecessary?
No! It looks only at place and route related(FRAM-level)rules. There may be issues within macros or std cells related to polysilicon,diffusion,contacts,n-wells,etc.which are not visible to IC Compiler.
5.Will IC Compiler route a metal trace in the "non-preferred" direction?
Not as a rule but you may see a "jog" now and agin.
6.What are the 4 routing operations that route_opt performs?
global routing,track assignment,detail routing and search&repair
7.What happens if route_opt is invoked before clock nets are routed? Why is this not recommended?
The clock nets would be routed at the same time as signal nets.Clock nets would have to compete with all other signal nets for routing resources,resulting in possibly less than ideal clock skew.
8.When is it appropriate to do more Search&Repair?
After Detail route,to fix remaing DRC violations,or anytime routing is modified thereafter,e.g. ECO Route.
9.Does rout_opt automatically fix cross talk problems?
No, roue_opt -xtalk_reduction will include xtalk processing.