//pll_locked_final = (pll_locked AND pll_locked_alt) //the time between 56 is 4us //The minimum pulse width for gxb_powerdown signal is 100 ns //The minimum pulse width for tx_digital_rst, rx_analog_rst and rx_digital_rst //is two parallel clock cycles // //Reset Sequence (1 2 3 4 5 6) / ...