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VV Verification View

已有 276 次阅读2017-4-1 09:00 |个人分类:验证杂谈|系统分类:芯片设计


Background

Design need to support 4 issues.
1st, function. 2nd,performance, 3rd,reliability. 4th,maintainablity.

So, the Verification also need to care them much.

1. interface.  timing sequence (the pkt will has viarable gap and the vlaid singal will be irregularly between high and low inside a pkt).
2. the performance.   throughput,  latency,  pkt latency skew.
3.  features
    function:   datastream(normal & abnormal), configration, data flow,  status indication(reg, interrput,  message and  so on).
    implemention: supportion for function.

beside,  the reset of system and the reset halfway will be careed much.


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