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Connections to DUT Interfaces(从Connect/TwoKingdomsFactory开始_2)

已有 498 次阅读2018-9-28 08:42 |系统分类:芯片设计

        Connecting the testbench to the DUT

       【此处需一幅图】

       在wishbone包装器中,为基类driver创建派生的concrete class driver的实例重载。请注意,此示例中的代码设置为处理wishbone总线包装器的多个实例(因此还有多个DUT),这是使用WB_ID参数来统一实例重载的原因。此参数在top_mac模块中设置。

        module top_mac;

               wb_bus_wrapper #(0) wb_bus_0();
               ...

        endmodule

        module wb_bus_wrapper #(int WB_ID = 0);
        ...

               // Concrete driver class
               class wb_bus_bfm_driver_c #(int ID = WB_ID) extends wb_bus_bfm_driver_base;
                    ...
               endclass

                initial begin
                    //set inst override of concrete bfm driver for base bfm driver
                    wb_bus_bfm_driver_base::type_id::set_inst_override(
                          wb_bus_bfm_driver_c #(WB_ID)::get_type(),
                          $sformatf("*env_%0d*", WB_ID));
                    ...
                end

        endmodule

        【此处需一幅图】

       在testbench中的wishbone agent中,声明了一个基类driver句柄。当它由factory创建时,重载将生效,并且将创建派生的concrete class driver object。作为此object的Verilog域来说,此对象包含的wishbone总线包装器及其Verilog路径将指示它位于top_mac(wb_bus_0)内部创建的wishbone总线包装器实例内。从UVM的角度来看,该对象是wishbone agent的UVM分层子代(不是子类,仅仅是agent包含了此object),其ports连接到wishbone agent中的ports。

       class wb_master_agent extends uvm_agent;
       ...
            //ports
            uvm_analysis_port #(wb_txn) wb_agent_drv_ap;
            ...
            // components
            wb_bus_bfm_driver_base wb_drv;
            wb_config m_config;
            ...
            function void build_phase(uvm_phase phase);
                 super.build_phase(phase);
                 if (!uvm_config_db #(wb_config)::get(this, "", "wb_config", m_config)) // get config object
                     `uvm_fatal("Config Fatal", "Can't get the wb_config")
                 //ports
                 wb_agent_drv_ap = new("wb_agent_drv_ap", this);
                 ...
                 //components
                 wb_drv = wb_bus_bfm_driver_base::type_id::create("wb_drv", this); // driver
                 ...
            endfunction : build_phase

            function void connect_phase(uvm_phase phase);
                 super.connect_phase(phase);
                 //analysis ports
                 wb_drv.wb_drv_ap.connect(wb_agent_drv_ap);
                 ...
                 // child ports
                 wb_drv.seq_item_port.connect(wb_seqr.seq_item_export);
            endfunction : connect_phase

            function void end_of_elaboration_phase(uvm_phase phase);
                 wb_drv.m_id = m_config.m_wb_master_id;
                 ...
            endfunction : end_of_elaboration_phase
      endclass

      (在http://verificationacademy.com/uvm-ovm上在线下载源代码示例)。


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