1. Directed Verification <-> Random Verification
1.1 Directed Verification
testcase生成stimulus, Env把stimulus发送给DUT, 并收集DUT的response并检测;
directed verification 也会使用一定的randomization(通常针对data)
每个testcase针对一个特定的feature.
testwriter需要列出每个feature (有时会错过一些corners)
1.2 CRV
stimulus 需要验证自动生成的test feature
test writer指定一组specification, testbench自动创建solution space并从中挑选出scenario
CRV可以减少单个test的manual effort和code和testcase的文件的数目
但是不能知道test quality,只能仰赖functioanl coverage
2. code coverage
2.1 block level: make sure logic, control and data path is fully verified
2.2 SOC level: interface among blocks are covered
units work together can be executed correctly
code coverage may not be useful
2.3 type of code coverage:
2.3.1 line coverage / statement coverage
2.3.2 block coverage
2.3.3 conditional coverage
2.3.4 branch coverage
2.3.5 toggle coverage
2.3.6 path coverage
2.3.7 FSM coverage